Integrated circuit memory devices provide both volatile and nonvolatile storage of data. One goal in designing such devices is to increase the storage density so that more data can be stored in a memory device that occupies less volume. One technique of increasing storage density is described in a co-pending, commonly assigned U.S. patent application of L. Forbes, entitled "A MULTI-STATE FLASH MEMORY CELL AND METHOD FOR PROGRAMMING SINGLE ELECTRON DIFFERENCES," Ser. No. 08/790,903, filed on Jan. 29, 1997, which disclosure is herein incorporated by reference.
The 08/790,903 U.S. patent application discloses a flash memory cell. The cell includes a transistor with a floating gate that is formed from a number of crystals of semiconductor material. The crystals are disposed in the gate oxide of the transistor. The size of the crystals and their distance from a surface of a semiconductor layer of the transistor are selected such that the crystals can trap a single electron by hot electron injection. Each trapped electron causes a measurable change in the drain current of the transistor. Thus, multiple data bits can be stored and retrieved by counting the changes in the drain current.
One potential shortcoming of the memory cell disclosed in the 08/790,903 U.S. patent application is that it does not necessarily have uniformly sized crystals. Instead, the grains have a finite grain size that may vary between individual grains. As a result, the capacitance of individual grains may also vary between individual grains. Even if such grains are capable of storing only a single electron, the resulting voltage on any particular grain may depend on the grain size. As electrons are being stored on respective grains, the resulting drain current may change in irregularly sized steps, making memory states differing only by a single stored electron difficult to distinguish. For the reasons described above, and for other reasons that will become apparent upon reading the following detailed description of the invention, there is a need for a memory cell that provides more uniformity in the step changes in drain current as single electrons are being stored on the memory cell.